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JP Morgan expands deployment of FPGA-based supercomputer

Fri, 16 Dec 2011 08:10:00 GMT

JP Morgan is expanding its use of supercomputers to speed up more of its fixed income trading operations.

Earlier this year, the bank revealed how it reduced the time it took to run an end-of-day risk calculation from eight hours down to just 238 seconds.

It recently won an award for this deployment, which was based on an application-led, High Performance Computing (HPC) system running on Field-Programmable Gate Array (FPGA) technology.

...The new dataflow supercomputer – where the computer chips are tailored to perform specific, bespoke tasks – will be equivalent to more than 12,000 conventional x86 cores, providing 128 Teraflops of performance.

More from ComputerWorld

Many companies are trying novel chip technologies to accelerate specialized kinds of computing jobs. But there’s signs that something a bit more radical, backed by technology vendors such as Maxeler Technologies, is also winning converts.

The London-based company was formed to commercialize a technology known by the phrase dataflow, a concept discussed since the 1970s that represents a sharp break from the fundamental design used in most computers and microprocessor chips inside them.

That traditional approach–named after computing pioneer John von Neumann, and sometimes called a control-flow architecture–involves programs that tell the computer what to do, one step at a time. Those steps can happen in any order, and the result is a system that can do multiple kinds of tasks pretty well.

In the dataflow approach, the chip or computer is essentially tailored for a particular program, and works a bit like a factory floor. Data flows into the hardware and passes to specialized “workers”–circuitry designed to do one particular job, like a specific piece of arithmetic. Each of those components handles a different part of the total computing job, and many pieces of data are moving thru the electronic production line at once.

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